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| PD - 9.1267G IRF7504 HEXFET(R) Power MOSFET l l l l l l l Generation V Technology Ultra Low On-Resistance Dual P-Channel MOSFET Very Small SOIC Package Low Profile (<1.1mm) Available in Tape & Reel Fast Switching S1 G1 S2 G2 1 8 7 D1 D1 D2 D2 2 VDSS = -20V 3 6 4 5 RDS(on) = 0.27 Description Fifth Generation HEXFETs from International Rectifier utilize advanced processing techniques to achieve extremely low on-resistance per silicon area. This benefit, combined with the fast switching speed and ruggedized device design that HEXFET Power MOSFETs are well known for, provides the designer with an extremely efficient and reliable device for use in a wide variety of applications. The new Micro8 package, with half the footprint area of the standard SO-8, provides the smallest footprint available in an SOIC outline. This makes the Micro8 an ideal device for applications where printed circuit board space is at a premium. The low profile (<1.1mm) of the Micro8 will allow it to fit easily into extremely thin application environments such as portable electronics and PCMCIA cards. T o p V iew Micro8 Absolute Maximum Ratings Parameter ID @ TA = 25C ID @ TA = 70C IDM PD @TA = 25C VGS dv/dt TJ,TSTG Continuous Drain Current, VGS @ -4.5V Continuous Drain Current, VGS @ -4.5V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Junction and Storage Temperature Range Max. -1.7 -1.4 -9.6 1.25 10 12 -5.0 -55 to + 150 Units A W mW/C V V/ns C Thermal Resistance Parameter RJA Maximum Junction-to-Ambient Typ. --- Max. 100 Units C/W All Micro8 Data Sheets reflect improved Thermal Resistance, Power and Current -Handling Ratings- effective only for product marked with Date Code 505 or later . 8/25/97 IRF7504 Electrical Characteristics @ TJ = 25C (unless otherwise specified) V(BR)DSS V(BR)DSS/TJ Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance RDS(ON) VGS(th) gfs IDSS I GSS Qg Q gs Q gd t d(on) tr t d(off) tf Ciss Coss Crss Min. Typ. Max. Units Conditions -20 --- --- V VGS = 0V, ID = -250A --- -0.012 --- V/C Reference to 25C, I D = -1mA --- --- 0.27 VGS = -4.5V, ID = -1.2A --- --- 0.40 VGS = -2.7V, ID = -0.60A -0.70 --- --- V VDS = VGS, ID = -250A 1.3 --- --- S VDS = -10V, ID = -0.60A --- --- -1.0 VDS = -16V, VGS = 0V A --- --- -25 VDS = -16V, VGS = 0V, TJ = 125C --- --- -100 VGS = -12V nA --- --- 100 VGS = +12V --- 5.4 8.2 ID = -1.2A --- 0.96 1.4 nC V DS = -16V --- 2.4 3.6 VGS = -4.5V, See Fig. 6 and 9 --- 9.1 --- VDD = -10V --- 35 --- I D = -1.2A ns --- 38 --- RG = 6.0 --- 43 --- RD = 8.3, See Fig. 10 --- 240 --- VGS = 0V --- 130 --- pF VDS = -15V --- 64 --- = 1.0MHz, See Fig. 5 Source-Drain Ratings and Characteristics IS ISM VSD t rr Q rr ton Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time Min. Typ. Max. Units Conditions MOSFET symbol --- --- -1.25 showing the A G integral reverse --- --- -9.6 p-n junction diode. --- --- -1.2 V TJ = 25C, IS = -1.2A, VGS = 0V --- 52 78 ns TJ = 25C, IF = -1.2A --- 63 95 nC di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD) D S Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) Pulse width 300s; duty cycle 2%. Surface mounted on FR-4 board, t 10sec. ISD -1.2A, di/dt 100A/s, VDD V(BR)DSS , TJ 150C IRF7504 100 VGS - 7.5V - 5.0V - 4.0V - 3.5V - 3.0V - 2.5V - 2.0V BOTT OM - 1.5V TOP 100 -I D , D ra in -to -S o u rce C u rre n t (A ) 10 -ID , D ra in -to -S o u rce C u rre n t (A ) 10 VGS - 7.5V - 5.0V - 4.0V - 3.5V - 3.0V - 2.5V - 2.0V BOTT OM - 1.5V TOP 1 1 0.1 0.1 - 1.5V -1.5 V 0.01 0.1 1 20 s P U LSE W IDTH TJ = 25 C A 10 0.01 0.1 1 20 s P UL SE W IDTH TJ = 150 C 10 A -VD S , D rain-to-S ource V oltage (V ) -VD S , Drain-to-Source V oltage (V ) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 10 2.0 -I D , D rain -to- S our ce C urr ent ( A ) T J = 2 5 C TJ = 1 5 0 C 1 R D S (o n ) , D ra in -to -S o u rc e O n R e si sta n ce (N o rm a li ze d ) I D = -1.2A 1.5 1.0 0.1 0.5 0.01 1.5 2.0 2.5 3.0 V DS = -1 0 V 2 0 s P U L S E W ID T H 3.5 4.0 4.5 5.0 A 0.0 -60 -40 -20 0 20 40 60 80 V G S = -4.5 V 100 120 140 160 A -VG S , Ga te-to-S o urce V oltage (V ) T J , Junction T emperature (C) Fig 3. Typical Transfer Characteristics Fig 4. Normalized On-Resistance Vs. Temperature IRF7504 500 10 -V G S , G a te -to -S o u rce V o lta g e (V ) 400 V GS C iss C rs s C os s = = = = 0V , f = 1 MH z C gs + C gd , C ds SH O R TED C gd C ds + C gd I D = -1 .2A VD S = -1 6V 8 C , C a p a cita n ce (p F ) C is s 300 6 C os s 200 4 C rs s 100 2 0 1 10 100 A 0 0 2 4 FOR TE ST C IR C U IT SE E FIG U R E 9 6 8 10 A -VD S , D rain-to-S ource V oltage (V) Q G , Total G ate C harge (nC) Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage 10 100 -IS D , R e ve rse D ra in C u rre n t (A ) OPE R ATIO N IN TH IS A RE A LIMITE D BY R D S(o n) 1 -I D , D ra in C u rre n t (A ) T J = 15 0C 10 1 00s T J = 25 C 1m s 1 10m s 0.1 0.01 0.4 0.6 0.8 1.0 VG S = 0 V A 0.1 1 T A = 25 C T J = 15 0C S ing le Pulse 10 1.2 A 100 -VS D , S ource-to-Drain V oltage (V ) -V D S , D rain-to-S ource Voltage (V ) Fig 7. Typical Source-Drain Diode Forward Voltage Fig 8. Maximum Safe Operating Area IRF7504 QG VDS VGS RG RD -4.5V VG QGS QGD D.U.T. + -4.5V Charge Pulse Width 1 s Duty Factor 0.1 % Fig 9a. Basic Gate Charge Waveform Current Regulator Same Type as D.U.T. Fig 10a. Switching Time Test Circuit 50K 12V .2F .3F td(on) tr t d(off) tf VGS + D.U.T. VDS 10% VGS -3mA 90% IG ID VDS Current Sampling Resistors Fig 9b. Gate Charge Test Circuit 1000 Fig 10b. Switching Time Waveforms Thermal Response (Z thJA ) 100 D = 0.50 0.20 10 0.10 0.05 0.02 0.01 1 SINGLE PULSE (THERMAL RESPONSE) PDM t1 t2 Notes: 1. Duty factor D = t 1 / t 2 2. Peak T J = P DM x Z thJA + TA 0.01 0.1 1 10 100 0.1 0.00001 0.0001 0.001 t1 , Rectangular Pulse Duration (sec) Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient - VDD IRF7504 Peak Diode Recovery dv/dt Test Circuit D.U.T + + Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer - + RG VGS* ** * dv/dt controlled by RG * I SD controlled by Duty Factor "D" * D.U.T. - Device Under Test + - VDD * * Reverse Polarity for P-Channel ** Use P-Channel Driver for P-Channel Measurements Driver Gate Drive P.W. Period D= P.W. Period [ VGS=10V ] *** D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt [ ] VDD Re-Applied Voltage Inductor Curent Body Diode Forward Drop [ Ripple 5% ISD ] *** VGS = 5.0V for Logic Level and 3V Drive Devices Fig 12. For P-Channel HEXFETS IRF7504 Package Outline Micro8 Outline Dimensions are shown in millimeters (inches) L E AD A S S IG N M E N TS D -B3 DDDD D1 D1 D 2 D 2 8765 DUAL 1234 S1 G 1 S2 G2 D IM A A1 8765 3 E -A1234 SSSG 8765 H 0.25 ( .0 10 ) M A M SIN G L E 1234 B C D e e1 E H e 6X e1 A -CB 8X 0.08 ( .0 03 ) M A1 C AS BS 0 .1 0 (.00 4) L 8X C 8X 3 .20 ( .12 6 ) 4.24 5.28 ( .16 7 ) ( .2 08 ) R EC O M M E N DE D FO O TP R IN T 1.04 ( .04 1 ) 8X 0 .3 8 8X ( .01 5 ) L INC H E S M IN .036 .004 .010 .0 05 .1 16 MAX .044 .008 .014 .0 07 .1 20 M ILL IM E TE R S M IN 0.91 0.10 0.25 0 .13 2 .95 MAX 1.11 0.20 0.36 0.18 3.05 .02 56 B A S IC .01 28 B A S IC .116 .1 88 .01 6 0 .120 .1 98 .0 26 6 0.65 BA S IC 0.33 BA S IC 2 .9 5 4 .78 0.4 1 0 3.05 5.03 0.6 6 6 N O TE S : 1 D IM E N S IO N IN G A N D T O LE R A N C IN G P E R A N SI Y 14 .5M -19 82 . 2 C O N T R O LL IN G D IM E N S IO N : IN C H . 3 D IM E N S IO N S D O N O T IN C L U D E M O LD F LA S H . 0.65 6 X ( .02 56 ) Part Marking Information Micro8 E X A M P L E : T H IS IS A N IR F 7 5 0 1 A D A T E C O D E (Y W W ) Y = L A S T D IG IT O F YE A R W W = W E EK 45 1 75 0 1 PART N UMB ER TOP IRF7504 Tape & Reel Information Micro8 Dimensions are shown in millimeters (inches) T E R M IN A L N U M B E R 1 12 .3 ( .4 8 4 ) 11 .7 ( .4 6 1 ) 8 .1 ( .3 1 8 ) 7 .9 ( .3 1 2 ) F E E D D I R E C T IO N N O TE S : 1 . O U TL IN E C O N FO R M S TO E IA -4 81 & E IA -5 4 1. 2 . C O N TR O LL IN G D IM E N S IO N : M IL L IM E TE R . 3 30 . 00 ( 12 . 99 2 ) MA X. 1 4. 4 0 ( . 56 6 ) 1 2. 4 0 ( . 48 8 ) NO T E S : 1. C O N T R O L L IN G D IM E N S IO N : M IL L IM E T E R . 2. O U T L IN E C O N F O R M S T O E I A -48 1 & E IA -5 4 1. WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020 IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111 IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371 http://www.irf.com/ Data and specifications subject to change without notice. 8/97 |
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